When national security organisations use electronic equipment in sensitive environments, they must be sure every element has been properly assured. In its latest challenge, HMGCC Co-Creation wants organisations to get involved in a five-month project, developing ways to robustly assure printed circuit boards (PCBs). The innovative methods used need to image and verify the complete manufactured PCB stack-up, providing assurance they will function where and when they are most needed. HMGCC Co-Creation will provide funding for time, material, overheads, and other indirect expenses.
All organisations associated with national security undertake sensitive and classified daily tasks, and there is the invariable need to use electronic equipment. Sensitive equipment may be sourced from a range of suppliers varying from bespoke construction by HMGCC to less well-established third-party routes. With all routes, there is a requirement to conduct due diligence on the constituent parts of an electronic system – ensuring functionality and security. The focus of this challenge is to non-destructively image and verify printed circuit boards (PCB), specifically focusing on analysing copper traces through both the external and internal stack-up
layers of complex multi-layer FR4 PCBs.
There exists capability to assure how a PCB functions and compare this to the intended design, or perhaps where there is no accessible design file. Displayed in table 1 is a non-exhaustive list of methods, the reason to use them and their drawbacks.
A PCB for verification could consist of multiple (potentially 10 or more) layers of copper traces, bonded on to FR4 glass epoxy substrates and laminated together. Each copper trace could be less than 35um in height, less than 100um in width and a copper clad layer less than 150um thick. On each PCB would be assembled a variety of electronic components of varying sizes and densities.
The variations in density and size of placed electronic components, thickness of the PCB, multiple copper trace layers and small feature sizes makes it very challenging to image copper traces on internal layers. Density variations will also likely cause shadowing across the imaged copper traces and whatever novel imaging method or technique is proposed, the capability to interpret this imperfect imagery to verify the copper trace routing and features is a requirement. To scale PCB assurance capability on high value equipment that must be usable after examination, requires development of non-destructive and novel methods to image and interpret the images of copper traces throughout complex multilayer PCBs to quickly assure that only intended functionality and connections are present, while retaining a low barrier to entry of use for the analyst.
This challenge is open to sole innovators, industry, academic and research organisations of all types and sizes. There is no requirement for security clearances. Solution providers or direct collaboration from countries listed by the UK government under trade sanctions and/or arms embargoes, are not eligible for HMGCC Co-Creation challenges.
Please submit your applications to challenges@sa.catapult.org.uk
Applications must be no more than six pages or six slides in length. The page/slide limit excludes personnel CVs and organisational profiles.
There is no prescribed application format, however, please ensure your application includes the following:
All information you provide as part of your proposal – whether submitted directly to HMGCC or via a collaborator platform – will be handled in confidence.